Special Session: AI/ML Hardware, Signal Processing and Next-Generation Computing

With the rapid development of real-time reasoning, large-scale data processing, and generative artificial intelligence applications, traditional computing architectures face unprecedented challenges in bandwidth, latency, energy efficiency, and scalability. At the same time, the continuous evolution of computing architectures and higher requirements for data processing capabilities in terms of scale, energy efficiency, and latency have also driven complex signal processing and intelligent algorithms to develop in the direction of higher performance and higher adaptability. This session focuses on key challenges and cutting-edge achievements in artificial intelligence/machine learning hardware, signal processing, and next-generation computing, covering innovative paths from circuit level to system architecture, and extending to multi-dimensional signal processing such as audio and images and their integrated applications in intelligent systems.

Topics

• Analog/mixed-signal computing
• Near-memory and in-memory computation
• Neuromorphic computing
• Reconfigurable processors and accelerators
• HW and systems for generative AI applications (LLMs, diffusion models)
• Audio and acoustic signal processing based on AI
• Image, video, and multidimensional signal processing based on based on AI
• AI/ML HW using emerging technologies

The manuscript should be submitted via the submission link (http://confsys.iconf.org/submission/iccc2025), or to  iccc2015@vip.163.com before the submission deadline (July 25, 2025).

Chair: Prof. Jianwei Zhang, Dalian University of Technology (DUT), Dalian, China

Jianwei Zhang (Member, IEEE) received the Ph.D. degree in microelectronics and solid-state electronics from the Harbin Institute of Technology, Harbin, China, in 2009. He is a Professor with the School of Control Science and Engineering, Dalian University of Technology (DLUT), Dalian, China. His current research interests include MCU design and verification, AI chip design, and biomedical specific chip design.